Nvidia has joined Maverick Silicon and Light Street Capital in a $125 million investment to support iPronics' development of second-generation optical circuit switching technology, according to a report published Wednesday by The Register. The funding aims to advance network infrastructure capable of connecting hundreds or thousands of GPU accelerators in next-generation AI systems. This marks Nvidia's latest bet on photonics after the chipmaker poured $6 billion into Coherent, Lumentum, and Marvell in March to accelerate optics technology development.
iPronics claims its silicon photonics-based design achieves sub-millisecond reconfiguration times, a dramatic improvement over the roughly 100 millisecond switching speeds common in existing micro-electromechanical systems. The company's iPronics One supports 32 ports per chip, and it's now developing 72- and 144-port chips. Using multi-chip modules and high-density connectors, iPronics estimates it can fit up to 720 port pairs into a single rack unit, compared to existing 300-port optical circuit switches from Coherent that typically consume eight or more rack units. The technology eliminates moving parts entirely, replacing MEMS mirrors and LCD-based systems with integrated photonics to shrink the physical footprint.
The report explains that optical circuit switches function like automated telephone switchboards, physically reconfiguring network paths using high-speed actuators rather than switching packets like traditional network chips. Google has deployed these appliances in its TPU clusters for years, allowing the company to change pod sizes on demand or virtually hot-swap failed accelerators without manual network reconfiguration. According to the report, optical circuit switching is "arguably the reason why Google is able to operate some of the largest single compute domains in the industry" because its network architecture isn't constrained by packet switch radix limitations.
The technology addresses a pressing infrastructure challenge as AI systems scale toward thousands of accelerators. For every trillion parameters, Nvidia requires eight LPX racks containing more than 2,000 accelerators, the report notes. These massive clusters could combine switched fabrics over copper inside individual racks with optical circuit switching orchestrating mesh topologies for rack-to-rack communications. The report suggests pipeline parallelism workloads, where data processes one chip at a time, make particularly good candidates for OCS-based mesh networks. Separately, startup Mixx Technologies revealed a connector capable of terminating tens of thousands of fibers to a single rack, comprising 64 fibers per SxC connector and enabling 384 64-fiber ports in one rack unit for 614 terabits per second of aggregate bandwidth at 400 gigabits per second. The confluence of faster reconfiguration speeds and denser fiber attachment could reshape how hyperscalers and AI-focused cloud providers architect their largest training environments. As compute density climbs from dozens to hundreds of GPUs per rack, the ability to dynamically rewire connections without physical intervention may determine which operators can economically scale to multi-trillion parameter models.